JPH0436578B2 - - Google Patents

Info

Publication number
JPH0436578B2
JPH0436578B2 JP59189146A JP18914684A JPH0436578B2 JP H0436578 B2 JPH0436578 B2 JP H0436578B2 JP 59189146 A JP59189146 A JP 59189146A JP 18914684 A JP18914684 A JP 18914684A JP H0436578 B2 JPH0436578 B2 JP H0436578B2
Authority
JP
Japan
Prior art keywords
type
region
transistor
base region
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59189146A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6167255A (ja
Inventor
Tomooki Hara
Hisashi Tajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59189146A priority Critical patent/JPS6167255A/ja
Publication of JPS6167255A publication Critical patent/JPS6167255A/ja
Publication of JPH0436578B2 publication Critical patent/JPH0436578B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/658—Integrated injection logic integrated in combination with analog structures

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP59189146A 1984-09-10 1984-09-10 半導体装置の製造方法 Granted JPS6167255A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59189146A JPS6167255A (ja) 1984-09-10 1984-09-10 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59189146A JPS6167255A (ja) 1984-09-10 1984-09-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6167255A JPS6167255A (ja) 1986-04-07
JPH0436578B2 true JPH0436578B2 (en]) 1992-06-16

Family

ID=16236188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59189146A Granted JPS6167255A (ja) 1984-09-10 1984-09-10 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS6167255A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5330922A (en) * 1989-09-25 1994-07-19 Texas Instruments Incorporated Semiconductor process for manufacturing semiconductor devices with increased operating voltages
JP2002203956A (ja) * 2000-12-28 2002-07-19 Mitsubishi Electric Corp 半導体装置

Also Published As

Publication number Publication date
JPS6167255A (ja) 1986-04-07

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term